1. Field of the Invention
The present invention relates to a semiconductor device used as an anti-fuse element and a method of manufacturing the semiconductor device.
2. Description of the Related Art
An anti-fuse element is normally electrically insulated but is electrically conductive when a voltage is applied to the element. The anti-fuse element is used in order to replace a defective portion of a semiconductor integrated circuit with a redundancy circuit.
FIG. 1A shows a sectional view of an anti-fuse element according to the related art in which a gate insulating film functions as an anti-fuse. FIG. 1B is a plan view of the anti-fuse element in FIG. 1A, showing only some components of the anti-fuse element for easy understanding of the configuration of the element.
As seen in FIG. 1A, the anti-fuse element according to the related art has a configuration that is the same as the layout of a common MOS (Metal Oxide Semiconductor) transistor. Active region 102 surrounded by isolation region 106 is provided on semiconductor substrate 110. Gate electrode 101 is provided on active region 102 via gate insulating film 104. As seen in FIG. 1B, gate electrode 101 is located to cross active region 102 so as to divide active region 102. Diffusion layer 105, which is formed by the introduction of impurities that have the opposite conductivity type into semiconductor substrate 110, is formed on opposite sides of active region 102 divided by gate electrode 103. Gate electrode 101 and diffusion layer 105 are connected to wiring layer 109 through contact plugs 108 formed in interlayer dielectric 107. For the purpose of description, contact plug 108 connected to gate electrode 101 and located on isolation region 106 in FIG. 1B is illustrated, in FIG. 1A, on the same cross section on which contact plugs 108 connected to diffusion layer 105 are present.
To allow proper operation of those of anti-fuse elements initially insulated by gate insulating film 104 which are to be connected, a high electric field is applied between gate electrode 101 and diffusion layer 105 to destroy gate insulating film 104, causing short-circuiting. Thus, gate electrode 101 can be connected to diffusion layer 105. This connection operation allows a high current to flow through the destroyed part of gate insulating film 104 to provide energy, resulting in ohmic contact.
In recent years, the gate insulating film has been thinned in connection with miniaturizing circuits to increase gate leakage current flowing between the gate electrode and the active region via the gate insulating film. In the anti-fuse element according to the related art described above, the increased gate leakage current may disperse the high current (energy) to areas other than the destroyed one when a high electric field is applied between the gate electrode and the diffusion layer. Thus, it may not be possible to obtain acceptable ohmic contact even after the dielectric has been destroyed, causing some elements to offer high resistance. To prevent this, a signal amplification circuit dedicated to the anti-fuse element is added or the circuit is changed such that anti-fuses are arranged in parallel to allow a logical OR operation to be performed. Then, even with the element offering high resistance, the circuit is prevented from operating inappropriately. However, this measure hinders a reduction in the size of chip area and also complicates circuit design and increases the number of steps required; thus this measure is not preferable.